The proceeding of ISSOC 2010 was released. There are some interesting articles:
- Efficient floating-point texture decompression, from Nokia and Tampere.
- Multiprocessor system and software design for distributed control applications, a nice talk by Samarjit Chakraborty, from the Institute for Real-Time Computer Systems of TU Munich.
Some interesting papers in IEEE Computing in Science and Engineering Nov.-Dec. 2010:
- Money for Research, Not Energy Bills: Finding Energy and Cost Savings in High-Performance Computer Facility Designs, from LLNL.
- Green HPC: From Nice to Necessity, from Sandia.
- Embedded Systems and Exascale Computing, from Rockwell Collins.
- Software and Hardware Techniques for Power-Efficient HPC Networking, from UIUC.
- Advanced Architectures and Execution Models to Support Green Computing, from Sandia.
- The Art of Approximation
- Programming Experiences Using the X10 Language
- High-Performance Heterogeneous Computing with the Convey HC-1, by Jason D. Bakos from U. of South Carolina.
Designing Chips without Guarantees, in IEEE Design and Test of Computers 2010. It is based on the panel discussion “Computing without Guarantees” in DAC 2010.
A unified methodology for the efficient computation of discrete orthogonal image moments, in Information Science 2009.
Fast and Memory Efficient 2-D Connected Components Using Linked Lists of Line Segments, in IEEE Transactions on Image Processing 2010. It will be the future classic.
Some slides on AMD’s “Ontario” fusion APU. It seems the “Ontario” APU has a traditional memory hierarchy and programming model for CPU/GPU fusion. It is reported that the CPU and GPU are sharing the off-chip DRAM instead of on-chip memory. That could be a drawback compared to the shared L3 approach in Sandy Bridge. There are some fancy slides from HotChip 2010 on the micro-architecture of Bobcat.